This invention relates generally to the field of network communication processors, and more specifically to the field of extracting bit fields from a packet.
Network communication systems demand fast performance. The performance of conventional processors in network communication systems is degraded by slow accessing of bit fields in received packets.
When a packet is received at a network processor it is stored in registers. The stored packets are not always aligned the same way in the registers. A stored packet may be stored over one or more registers and be offset. Conventional systems have a plurality of code paths written to handle the different possibilities of packet positioning within registers. For example, FIG. 1 shows different package storage possibilities 100. In this example, a combination of three registers 110 may store a packet having fields F1 and F2 in 4 different ways. Conventional systems have four code paths for extracting bit fields F1 and F2 based on the packet position determined during runtime. After determining a packet's storage position, conventional systems use the corresponding code path to perform a combination of shift and/or operations that shift a field into a desired position, mask the remaining non-field bits and store the field in a result register.
Therefore, it would be desirable to have a single set of instructions that may be used, regardless of the bit field's positioning in the registers to extract the bit field from the packet and insert in a result register.